US patent application No 2002042909 discloses the use of a retargetable compiler for performing different parts of a program using different instruction sets for a plurality of functional units in a VLIW data processor. The program is compiled into machine instructions that specify an operation to be executed, like addition, shifting, etc, of source registers from which operands for the operation must be loaded and a destination register where the results of the operation must be stored.
Different instruction sets are used that provide different degrees of control over the functional units. A first instruction set allows instructions to control parallel operation independently by means of a plurality of functional units. A second instruction set allows only operation of only one functional unit to be controlled by each instruction. Comparing the first and second instruction set, the first instruction set has the advantage that it generally takes less time to execute a task when the task is coded in instructions for the first instruction mode and the second instruction mode has the advantage that generally less memory is needed to store a program for performing a task.
The compiler is provided with a program and hardware instructions corresponding to the different instruction sets. The compiler selects instruction sets for different program parts, using the first instruction set for inner loops, for example, and the second instruction set for program parts outside inner loops. Next, the compiler compiles the program parts into programs of machine instructions from the selected instruction sets.
The data processing circuit that is used to execute the program is configured to be switchable between different instruction modes, corresponding to the different instruction sets for the plurality of respective functional units. When operating in an instruction mode, the data processing circuit interprets instructions supplied to the data processing circuit as instructions from the instruction set that corresponds to the current instruction mode. US patent application No 2002042909 is not concerned with how switching between instruction modes is performed, but refers to U.S. Pat. No. 5,933,642 which uses dedicated reconfiguration instructions for this purpose.
This method of executing a program limits the optimization of the combination of execution speed and program size. Furthermore, the use of special reconfiguration instructions expands the instruction set.